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docs: the CUDA path, re-measured on an A10G at the current pin set - #99

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docs/cuda-path-reverified
Sep 22, 2026
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docs/cuda-path-reverified

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@vyncint vyncint commented Sep 22, 2026

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Closes #83.

The first time anything automated has run this project's CUDA path. The headline result in the README was produced by hand on 2026-08-20 and had not been reproduced since; the lockstep set moved twice in between, and docs/LIMITATIONS.md documents a way for the compile step to break that nobody would have heard about.

Provenance

host AWS g5.xlarge, us-east-2c, NVIDIA A10G (sm_86, cc 8.6)
driver / CUDA 595.71.05 / 13.2
rustc 1.100.0-nightly (e457a7b0d 2026-08-27)
analyzer / compiler cargo-reconverge 0.7.0 / cargo-oxide 0.2.1
pins cuda-oxide b0f961df, launchbound v2.3.0

The result

prune (cc 8.6) ...  3 admitted, 8 refused; compiling admitted specializations ...
3/3 measured ok, 3.2 GPU-seconds, budget not exhausted

0.033792 ms  [0.033792, 0.034816]  n=99   block_x=32 tile=128
0.045056 ms  [0.045056, 0.045056]  n=75   block_x=32 tile=256
0.074752 ms  [0.074752, 0.074752]  n=99   block_x=32 tile=512

RESULT every structural claim holds at this pin

0.033792 ms for block_x=32 tile=128 is the 0.0338 ms the README quotes — from a run a month earlier, on a different instance of the same part, under a different analyzer and a different cuda-oxide. That the two agree to the published digit is the strongest evidence this repository has that its measurement path is stable, and it is the first time the claim has been checked rather than carried forward.

The 3 / 8 split matches the laptop result, all three admitted candidates compiled (so the #[unroll]-class hole did not bite at this pin), and the structural invariants gpu.yml gates on all held.

One thing recorded rather than smoothed over

Two of the three 95% intervals are zero-width, and every median is a multiple of 1024 ns. That is the CUDA event timer's granularity showing through at ~30–75 µs, not perfect reproducibility. It does not affect this ranking — the three are far apart — but it means "two configurations whose intervals overlap are reported indistinguishable" is doing less work at this scale than the noise-floor section implies, and it is noted there.

How it ran

Unattended from EC2 user-data. ssm:StartSession is denied to the role this account uses and gpu-sg has no inbound rules, so the serial console was the only channel back; the instance terminates itself. gpu.yml remains the path for anyone with a registered GPU runner.

The first time anything automated has run it. The headline result in the
README was produced by hand on 2026-08-20 and had not been reproduced
since, while the lockstep set moved twice and LIMITATIONS documents a way
for the compile step to break that nobody would have heard about.

block_x=32 tile=128 came in at 0.033792 ms, which is the 0.0338 ms the
README quotes -- from a run a month earlier, on a different instance of
the same part, under a different analyzer and a different cuda-oxide. The
gate admitted 3 and refused 8 as it does on a laptop, all three admitted
candidates compiled, all three measured, and every structural invariant
held.

Recorded with its full provenance rather than as a number: host, driver,
CUDA, rustc, analyzer, compiler and both pins.

One thing noted rather than smoothed over: at ~30-75 microseconds two of
the three 95% intervals are zero-width and every median is a multiple of
1024 ns, which is the CUDA event timer's granularity showing through. It
does not affect this ranking, and it means the "overlapping intervals are
indistinguishable" rule is doing less work at this scale than the
noise-floor section implies.

Signed-off-by: Vyncint Ng <chivy.nguyen@manabie.com>
@vyncint
vyncint merged commit 57991f1 into main Sep 22, 2026
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vyncint deleted the docs/cuda-path-reverified branch September 22, 2026 09:46
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Nothing automated has ever run the CUDA path

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