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Port 'Fix verse range marker placement bug' #558

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@Enkidu93

Port any relevant changes in sillsdev/machine.py#371 from machine.py to machine.

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  1. added
    portingThis issue consists of porting code from machine.py to machine.
    on Oct 26, 2026
  2. claude commented on Oct 26, 2026

    @claude
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    Claude finished @Enkidu93's task in 5m 49s —— View job • claude/issue-558-20261026-1309 • [Create PR ➔](https://github.com/sillsdev/machine/compare/master...claude/issue-558-20261026-1309?quick_pull=1&title=Issue%20%23558%3A%20Changes%20from%20Claude&body=This%20PR%20addresses%20issue%20%23558%0A%0AGenerated%20with%20%5BClaude%20Code%5D(https%3A%2F%2Fclaude.ai%2Fcode)


    Port of machine.py PR #371 is done

    Not ported: the machine.py warning logs, because SIL.Machine has no logging dependency. I also skipped the machine.py tests that only cover that logging and the unaligned-end placement.

    Public API change: UsfmUpdateBlock.Metadata and the block's mutator methods are gone. Rows replaces Metadata, and the mutators now live on an internal builder. This matches the machine.py change.
    · branch claude/issue-558-20261026-1309

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