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Restore the instruction-pattern optimizations removed from the AVX optimization series: BSR/NOT/ADD and clamp-u8 folding, u16 difference/CMOV folding, and the AVX three-lane sum sequence. Keep matching behind CONFIG_LATX_INSTS_PATTERN and option_instptn, run the scanners after flag analysis, and dispatch the folds through try_translate_instptn(). Add self-checking integration fixtures for full-register integer behavior, AVX alias and observation guards, and JIT/cold-AOT/hot-AOT execution. The hot-AOT runner verifies that the generated cache was loaded instead of silently falling back to JIT. Validation: LoongArch x86_64 build passed; test-avx-vector-sums, test-integer-diff-cmov and test-integer-patterns passed; GDB confirmed all four matchers and their translation paths ran; lat-pr-fast passed 49/49. No i386 runtime test, native x86 result or performance benchmark is claimed. Signed-off-by: Zhaoyang Xie <xie_zyang@163.com>
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Summary
This draft records the instruction-pattern optimizations that were removed from
the final AVX optimization series and are not present in current master:
The restored matchers remain gated by
CONFIG_LATX_INSTS_PATTERNandoption_instptn, run after flag analysis, and dispatch throughtry_translate_instptn().This is currently an archival draft, not a merge-ready optimization claim.
Validation
test-avx-vector-sumspassed.test-integer-diff-cmovpassed.test-integer-patternspassed.the
SEG_AOT_LOADEDmarker, so a JIT fallback does not pass the test.lat-pr-fast: 49/49 passed.Checklist
CONTRIBUTING.md.git commit -s).documented.