Conversation
Preserve upstream persistent AdaLN cache and lazy runner construction while retaining MPS query chunking, short clips, and clone-free disk streaming. Adapt cache device selection for MPS and refresh merge regression tests. Validation: 169 tests passed on host MPS; CLI help smoke passed. The uncommitted target-bytes patch remains separately saved in stash.
Preserve SM120 FP8-F16 accumulation alongside MPS streaming and official VAE loading. Defer Triton import until FP8 execution and adapt isolated test fixtures for the new FP8 helpers.
统一使用 Diffusers 权重布局，移除分支中的 raw 格式适配，保留 MPS 低内存推理所需的按需加载。 - 删除 raw DiT/VAE 参数映射、QKV/FFN 转换及配置别名兼容 - 沿用上游 safetensors 文件发现方式，移除固定索引名和参数名前缀白名单 - 将 AdaLN 缓存构建器恢复为 ModelTC 上游实现 - 在 MPS 清理缓存前同步 GPU，调整 VAE 按阶段加载与释放 - 更新模型路径、采样步数和缓存配置，新增 512×512、22 帧、4 步配置及使用说明 - 删除 tests/models/minimax_h3 下的测试文件 BREAKING CHANGE: MiniMax-H3 不再支持 raw 权重布局，请使用 Diffusers 版本。
- 复用现有 block offload 架构，重叠后台权重预读与 GPU 计算 - 通过 MPS 共享视图直接读取 safetensors，省去中间 CPU 权重副本 - 保持 diffusers 权重发现规则及原有计算逻辑 - 完善 buffer 同步、异常处理、释放及重新初始化流程 - 默认启用 dit_mps_shared_buffer，并补充使用说明
Resolve PR ModelTC#1497 conflicts while retaining MPS temporal padding and upstream Video VAE FP8 Conv3D support. Adapt MPS inference and AdaLN cache scripts to --model-variant fl2av, and migrate output settings to size, num_frames and fps. Use the model variant for streaming initialization and low-memory residency now that upstream keeps task selection in requests. Advertise only t2av when text-encoder disk streaming is enabled. Validation: all pre-commit hooks and 30 focused/regression tests passed. Full MPS 512x512 / 22-frame / 4-step inference completed; the output MP4, decoded video and audio are bitwise identical to the pre-merge run.
Resolve PR ModelTC#1497 conflicts with upstream e58544a while preserving MPS disk streaming, shared device buffers and low-memory VAE residency. Keep upstream shared CPU weight loading and fused QKV support; reject incompatible shared-CPU/disk-streaming configurations explicitly. Skip processor and vision tower preloading for text-only disk streaming. Route block-buffer release/recreation through the disk streaming lifecycle when selected, without entering CUDA-only buffer management. Validation: all pre-commit hooks, 6 MPS regression tests, inference and AdaLN cache CLI help, and shell syntax checks passed. Full MPS inference at 512x512, 22 frames, 4 steps and seed 42 completed before and after the merge; MP4 bytes, decoded video and audio are identical.
helloyongyang
approved these changes
Sep 21, 2026
Keep BF16 RoPE specific to MPS so other platforms remain eligible for fused QKV norm/RoPE. Refresh fused QKV views after binding shared MPS buffers, and let query chunking handle arbitrary attention shapes and GQA. Reuse text checkpoint validation, remove unused streaming options and unreachable VAE lifecycle branches, and restore upstream validation errors. Replace machine-specific script paths with environment configuration and keep MPS cache defaults in a dedicated wrapper. Shorten the MPS guide. Validation: - 10 MPS regression tests passed, including active fused QKV projections, buffer recreation, generic SDPA chunking, and native/streamed text weights. - 5 launcher smoke checks passed with platform overrides and spaced paths. - Pre-commit checks passed for all changed files. - 512x512, 22-frame, 4-step T2AV completed on Apple MPS; the MP4 and decoded video/audio exactly match the pre-change output. - CUDA/XPU fusion eligibility checked without those accelerators.
Remove MPS import guards and None kernel placeholders. Bind kernels when their implementation is selected, retaining the existing quantization fallback order and native PyTorch paths.
Restore the regular attention and RoPE imports without MPS exclusion blocks. Load internal Triton dependencies only in the paths that use them. Move SVG's two JIT kernels into kernels/svg.py and reuse the existing SVG2 utility module for its two permutation kernels. Preserve the registry, public wrapper functions, custom-op declarations, and kernel computations. Add a fresh-process regression check for registration without Triton under MPS and CUDA platform settings, native LayerNorm execution, and early failure when constructing Triton MM/Norm implementations without Triton. Validation: 11 tests and pre-commit checks passed. The 512x512, 22-frame, 4-step MPS T2AV output is byte-identical to the previous output, including decoded video/audio. AST comparison confirms unchanged computations in 45 attention classes/functions, including all four relocated kernels. CUDA registration was checked without CUDA hardware; its kernels were not executed on this host.
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
2 participants
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Summary
This PR adds MPS support for MiniMax-H3 inference in LightX2V and fixes several compatibility issues found during validation on Apple Silicon.
Main changes
Validation
Tested on MacBook with Apple Silicon:
All related tests pass.
Notes
The changes mainly target Apple Silicon / MPS compatibility while preserving existing CUDA behavior.