Bugfix/act fixes - #59
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September 22, 2026 16:46
using ACT showed that mtval handling was incorrect and mstatush must exist
Issues were incorrect precedence in generator code and missing update of fcsr. These were exposed by ACT. TODO: correct the generator and CoreDsl.
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eyck
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Sep 23, 2026
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The changes in vm_rv32gc and vm_rv64gc need to be reflected in teh CoreDSL desciptions (https://github.com/Minres/RISCV_ISA_CoreDSL) otherwise they get overwritten by a generation run...
| // execute instruction | ||
| { | ||
| *(F+rd) = NaNBox32(((uint32_t)(~bit_sub<31, 31-31+1>(unbox_s(traits::FLEN, *(F+rs2))))& ((1ULL << 1)-1)<<31)|bit_sub<0, 30-0+1>(unbox_s(traits::FLEN, *(F+rs1)))); | ||
| *(F+rd) = NaNBox32((((uint32_t)(~bit_sub<31, 31-31+1>(unbox_s(traits::FLEN, *(F+rs2))))& ((1ULL << 1)-1))<<31)|bit_sub<0, 30-0+1>(unbox_s(traits::FLEN, *(F+rs1)))); |
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SInce this is generated code, Is this fixed in the CoreDSL description or generator??
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No it is currently only fixed in the generated code, but @EAlexJ said he will fix the generator, as well.
| // execute instruction | ||
| { | ||
| *(F+rd) = NaNBox64(f32tof64(unbox_s(traits::FLEN, *(F+rs1)), get_rm(rm))); | ||
| uint32_t flags = fget_flags(); |
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Same here: is it fixed in CoreDSL?
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Same here, only fixed in the generated code.
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