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Reviewed commit: 7a5245b2dd
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| batch_ptrs, batch_sizes, _ = self._preprocess_tensors_for_put(batch_tensors) | ||
| batch_ptrs, batch_sizes, batch_tensors = self._preprocess_tensors_for_put(batch_tensors) | ||
| if self._buffer_pool is not None and len(set(batch_keys)) == len(batch_keys): |
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Keep NPU tensors on the direct registration path
When protocol="rdma" is used with an Ascend/NPU TensorDict, _preprocess_tensors_for_put preserves NPU tensors (it only calls .cpu() for CUDA), yet this unconditional pool branch sends them to _copy_between_buffer_and_tensors, whose torch.frombuffer destination is CPU memory. The previous path registered each NPU data_ptr() directly (and _bind_npu_device exists to make those registrations work); now every pool-sized NPU value pays a synchronous device-to-host copy and loses the direct-device transfer path, while only oversized or pool-exhausted groups retain the old behavior. Restrict pooling to CPU-backed tensors so NPU puts keep the registered-pointer path.
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overview
Extend the pre-registered buffer pool approach from #175, which optimized GET, to CPU RDMA PUT.
Implementation
BufferPool, backed by the local buffer registered during store setup.Evaluation
Setup
Benchmarks ran on a single node with the PUT client and storage segment colocated, using RDMA with either 1 or 8 HCAs. Each HCA port reported an active Ethernet link rate of 200 Gb/s.
0.3.12.post1uint8tensorsLatency measures
await client.async_put(metadata=None), including metadata, storage, and controller work. Payload preparation, initialization, subsequent GET verification, and partition clearing run outside the timed region. The figure below presents the complete benchmark results.PUT latency
The table below includes the single-key, 1 GiB total, and largest tested cases for each payload size, with duplicates removed. Speedup is baseline median latency divided by pooled median latency.