From 93fd69c0c1c63a1b742228d45b76b730538809e2 Mon Sep 17 00:00:00 2001
From: Tim Paine <3105306+timkpaine@users.noreply.github.com>
Date: Tue, 6 Oct 2026 14:19:39 -0400
Subject: [PATCH 1/2] State the measured CPU-plus-card result in the Proof
section
Replaces the withdrawn fused-workflow comparison with the resident collaborative result on dpv2: 4.2 ms together against 10.4 ms for the host CPU alone, 2.5x, bit-exact at every measured split, on a consumer-grade card in a consumer-grade desktop.
Signed-off-by: Tim Paine <3105306+timkpaine@users.noreply.github.com>
---
src/lib/home/Proof.svelte | 15 +++++++++------
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/src/lib/home/Proof.svelte b/src/lib/home/Proof.svelte
index 936df13..8b01fed 100644
--- a/src/lib/home/Proof.svelte
+++ b/src/lib/home/Proof.svelte
@@ -6,11 +6,13 @@
dau began on dpv1 with a 5 GB NYSE TAQ dataset and a concrete task: calculate OHLCV bars.
Staged resident, repeated queries ran in 0.92 seconds against 1.5 seconds on the CPU—39%
- lower per-query latency, every result matched to the software golden. dpv2 now carries that
- work further: a fused temporal-finance workflow—as-of join, derived features, time bars and
- rolling moments in a single pass, with no intermediate ever written back to memory—runs in
- 11.5 ms against 31.4 ms for the same workload on an 18-core laptop, bit-exact. The
- accelerator costs a fraction of the machine it outruns.
+ lower per-query latency, every result matched to the software golden. dpv2 is commodity
+ hardware doing real work: a consumer-grade FPGA card that costs about $700, in a
+ consumer-grade desktop with a quad-core Intel Core i7. With a six-million-row table resident
+ on the card, Polars and the card working the same scan together finished in 4.2 ms against
+ 10.4 ms for the CPU alone, using all of its threads. That is 2.5x faster, and every result
+ matched the software golden at every one of the 164 split points we measured. The scheduler
+ chose the split from measured costs; nobody tuned it by hand.
@@ -43,7 +45,8 @@
204K LUTs · 10 GB DDR3 · PCIe x8
Two memory systems (2 GB onboard for bandwidth, 8 GB SODIMM for resident capacity) and
- eight parallel lanes. Where the fused temporal workflow now beats the CPU baseline.
+ eight parallel lanes. CPU and card together: 2.5x the CPU alone on a resident scan,
+ bit-exact.
From 6dcb3ba309082b277c7c6fdb1af63c87875151c7 Mon Sep 17 00:00:00 2001
From: Tim Paine <3105306+timkpaine@users.noreply.github.com>
Date: Tue, 6 Oct 2026 14:24:21 -0400
Subject: [PATCH 2/2] Check the Proof section's measured result in the page
test
Signed-off-by: Tim Paine <3105306+timkpaine@users.noreply.github.com>
---
tests/test.ts | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tests/test.ts b/tests/test.ts
index 855862d..d8ec84e 100644
--- a/tests/test.ts
+++ b/tests/test.ts
@@ -25,7 +25,8 @@ test('home page presents both ends of the dau platform', async ({ page }) => {
await expect(page.getByText('In design')).toBeVisible();
await expect(page.getByText('39% lower per-query latency', { exact: false })).toBeVisible();
// the current platform's measured result, not just the origin story
- await expect(page.getByText('11.5 ms', { exact: false })).toBeVisible();
+ await expect(page.getByText('4.2 ms against', { exact: false })).toBeVisible();
+ await expect(page.getByText('2.5x faster', { exact: false })).toBeVisible();
await expect(page.getByRole('link', { name: 'Become a design partner' })).toBeVisible();
});